Product Summary

The HYB39S128160CT-7.5 is a four bank Synchronous DRAM organized as 4 banks × 8MBit x4, 4 banks × 4MBit x8 and 4 banks × 2Mbit x16 respectively. The HYB39S128160CT-7.5 achieves high speed data transfer rates by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock. The HYB39S128160CT-7.5 is fabricated using the Infineon advanced 0.17 micron process technology.

Parametrics

HYB39S128160CT-7.5 absolute maximum ratings: (1)Operating Temperature Range: 0 to + 70 °C; (2)Storage Temperature Range : – 55 to + 150 °C; (3)Input/Output Voltage: – 0.3 to VDD + 0.3 V; (4)Power Supply Voltage VDD/VDDQ: – 0.3 to + 4.6 V; (5)Power Dissipation : 1 W; (6)Data out Current (short circuit): 50 mA.

Features

HYB39S128160CT-7.5 features: (1)Multiple Burst Read with Single Write Operation; (2)Automatic and Controlled Precharge Command; (3)Data Mask for Read/Write Control (x4, x8); (4)Data Mask for byte control (x16); (5)Auto Refresh (CBR)and Self Refresh; (6)Power Down and Clock Suspend Mode; (7)4096 Refresh Cycles / 64 ms; (8)Random Column Address every CLK (1-N Rule); (9)Single 3.3 V ± 0.3 V Power Supply; (10)LVTTL Interface.

Diagrams

HYB39S128160CT-7.5 pin connection