(Hong Kong)
Product Summary
The AM29BL802CB-70RZE is an 8 Mbit, 3.0 Volt-only burst mode Flash memory organized as 524, 288 words. The device is offered in a 56-pin SSOP package. The AM29BL802CB-70RZE is designed to be programmed in-system with the standard system 3.0-volt VCC supply. A 12.0-volt VPP or 5.0 VCC is not required for program or erase operations. The AM29BL802CB-70RZE can also be programmed in standard EPROM programmers. The device offers access times of 65, 70, 90, and 120 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention the device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The AM29BL802CB-70RZE is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices.
Parametrics
AM29BL802CB-70RZE absolute maximum ratings: (1)Storage Temperature Plastic Packages: -65°C to +150°C; (2)Ambient Temperature with Power Applied: -65°C to +125°C; (3)Voltage with Respect to Ground VCC: -0.5 V to +4.0 V; (4)A9, OE#, and RESET#: -0.5 V to +13.0 V; (5)All other pins: -0.5 V to +5.5 V; (6)Output Short Circuit Current: 200 mA.
Features
AM29BL802CB-70RZE features: (1)32 words sequential with wrap around (linear 32), bottom boot; (2)One 8 Kword, two 4 Kword, one 48 Kword, three 64 Kword, and two 128 Kword sectors; (3)Single power supply operation; (4)Read access times; (5)Alterable burst length via BAA# pin; (6)Power dissipation (typical); (7)5 V-tolerant data, address, and control signals; (8)Sector Protection; (9)Minimum 100,000 erase cycle guarantee per sector; (10)20-year data retention; (11)Compatibility with JEDEC standards; (12)Erase Suspend/Erase Resume; (13)Hardware reset pin (RESET#): Hardware method to reset the device for reading array data; (14)Package Option: 56-pin SSOP; (15)Embedded Algorithms.
Diagrams
