CY7C0251-15AC

Product Summary

The CY7C0251-15AC is an 8K × 16/18 dual-port static RAM. Various arbitration schemes are included on the CY7C0251-15AC to handle situations when multiple processors access the same piece of data. The CY7C0251-15AC is provided, permitting independent, asynchronous access for reads and writes to any location in memory. The CY7C0251-15AC can be utilized as standalone 16-/18-bit dual-port static RAMs or multiple devices can be combined in order to function as a 32-/36-bit or wider master/slave dual-port static RAM. An M/S pin of the CY7C0251-15AC is provided for implementing 32-/36-bit or wider memory applications without the need for separate master and slave devices or additional discrete logic. Application areas of the CY7C0251-15AC include interprocessor/multiprocessor designs, communications status buffering, and dual-port video/graphics memory.

Parametrics

CY7C0251-15AC absolute maximum ratings: (1)Storage Temperature: -65 to +150 ℃; (2)Ambient Temperature with Power Applied: –55 to +125 ℃; (3)Supply Voltage to Ground Potential: –0.3 V to +7.0 V; (4)DC Voltage applied to outputs in high Z state: –0.5 V to +7.0 V; (5)DC Input Voltage: –0.5 V to +7.0 V; (6)Output Current into Outputs (LOW): 20 mA; (7)Static Discharge Voltage: ＞2001V; (8)Latch-Up Current: ＞200 mA.

Features

CY7C0251-15AC features: (1)True Dual-Ported memory cells which allow simultaneous reads of the same memory location; (2)8K × 18 organization; (3)0.65-micron CMOS for optimum speed/power; (4)High-speed access: 15 ns; (5)Low operating power: ICC = 150 mA (typ.); (6)Fully asynchronous operation; (7)Automatic power-down; (8)Expandable data bus to 32/36 bits or more using Master/Slave chip select when using more than one device; (9)On-chip arbitration logic; (10)Semaphores included to permit software handshaking between ports ; (11)INT flag for port-to-port communication; (12)Separate upper-byte and lower-byte control; (13)Pin select for Master or Slave; (14)Available in 84-pin PLCC and 100-pin TQFP.

Diagrams