(Hong Kong)
Product Summary
The POMAP310GGZG is a highly integrated hardware and software platform, designed to meet the application processing needs of next-generation embedded devices. The POMAP310GGZG platform enables OEMs and ODMs to quickly bring to market devices featuring rich user interfaces, high processing performance, and long battery life through the maximum flexibility of a fully integrated mixed processor solution.The POMAP310GGZG is designed to run leading open and embedded RISC-based operating systems, as well as the Texas Instruments (TI) DSP/BIOS software kernel foundation, and is available in two 289-ball lead-free ball grid array (BGA) packages (ZDY and ZZG).
Parametrics
POMAP310GGZG absolute maximum ratings: (1)Supply voltage range (core), CVDD, CVDD2, CVDDA,CVDDRTC, CVDDDLL: −0.5 V to 2.1 V; (2)Supply voltage range (I/O), DVDD1/2/3/4/5/6/7/8/9/RTC, 1.8 V nominal: −0.5 V to 2.1 V, 2.75 V and 3.3 V nominal: −0.5 V to 4.2 V; (3)Input voltage range, VI (12, 13, or 19.2 MHz and 32-kHz oscillator): −0.5 V to 2.1 V; (4)Input voltage range, VI (standard LVCMOS), 1.8 V nominal: −0.5 V to (2.1 or DVDD + 0.5)V, 2.75 V and 3.3 V nominal: −0.5 V to (4.2 or DVDD + 0.5)V; (5)Input voltage range, VI (USB transceivers): −0.5 V to DVDD + 0.5 V; (6)Input voltage range, VI (I2C): − 0.5 V to 4.5 V; (7)Output voltage range, VO (standard LVCMOS), 1.8 V nominal: −0.5 V to (2.1 or DVDD + 0.5)V, 2.75 V and 3.3 V nominal: −0.5 V to (4.2 or DVDD + 0.5)V; (8)Output voltage range, VO (USB transceivers): −0.5 V to DVDD + 0.5 V; (9)Output voltage range, VO (I2C): −0.5 V to 4.5 V; (10)Operating temperature range, TC: −40°C to 85°C; (11)Storage temperature range, Tstg: −65°C to 150°C.
Features
POMAP310GGZG features: (1)One/Two Instructions Executed per Cycle; (2)Dual Multipliers (Two Multiply-Accumulates per Cycle); (3)Two Arithmetic/Logic Units; (4)Five Internal Data/Operand Buses (3 Read Buses and 2 Write Buses); (5)32K x 16-Bit On-Chip Dual-Access RAM (DARAM)(64K Bytes); (6)48K x 16-Bit On-Chip Single-Access RAM (SARAM)(96K Bytes); (7)Instruction Cache (24K Bytes); (8)Video Hardware Accelerators for DCT, iDCT, Pixel Interpolation, and Motion Estimation for Video Compression.
Diagrams
