(Hong Kong)
Product Summary
The XPC860SRZP33C1 is a Quad Integrated Communications Controller. The device is designed for a variety of controller applications. The XPC860SRZP33C1 particularly excels in both communications and networking systems. The PowerQUICC unit is referred to as the MPC860 in this manual. The communications processor module (CPM) from the XPC860SRZP33C1 QUICC has been enhanced by the addition of the inter-integrated controller (I2C) channel. The memory controller has been enhanced, enabling the MPC860 to support any type of memory, including high-performance memories and new types of DRAMs.
Parametrics
XPC860SRZP33C1 absolute maximum ratings: (1)Supply Voltage, VDDH: –0.3 to 4.0 V; VDDL: –0.3 to 4.0 V; KAPWR: –0.3 to 4.0 V; VDDSYN –0.3 to 4.0 V; (2)Input voltage, Vin: GND – 0.3 to VDDH V; (3)Temperature (Standard) TA(min): 0℃; Tj(max): 95℃; (4)Temperature (Extended), TA(min): –40℃; Tj(max) 95℃; (5)Storage Temperature Range, Tstg: –55 to 150℃.
Features
XPC860SRZP33C1 features: (1)Contains complete dynamic RAM (DRAM) controller; (2)Each bank can be a chip select or RAS to support a DRAM bank; (3)Glueless interface to DRAM, SIMMS, SRAM, EPROM, Flash EPROM, and other memory devices.; (4)DRAM controller programmable to support most size and speed memory interfaces; (5)Four CAS lines, four WE lines, one OE line; (6)Boot chip-select available at reset (options for 8-, 16-, or 32-bit memory); (7)Variable block sizes (32 Kbyte to 256 Mbyte); (8)Selectable write protection; (9)On-chip bus arbitration logic; (10)Four 16-bit timers or two 32-bit timers; (11)Gate mode can enable/disable counting; (12)Interrupt can be masked on reference match and event capture.
Diagrams
