(Hong Kong)
Product Summary
The CD4030BE belongs to CD4030B family types consist of four in dependent exclusive-or gates. The CD4D30B provides the system designer with a means for direct implementation of the exclusive-or function. The CD4030B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages Ml; M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
Parametrics
CD4030BE absolute maximum ratings: (1)DC supply-voltage range, (VDD) voltages referenced to VSS terminal): -0.5V to +20V; (2)in put voltage range, all inputs: -0.5V to VDD+0.5V; (3)DC input current, any one input : ±10mA; (4)power dissipation per package for TA = -55℃ to +100℃: 500mW; (5)for TA = +100℃ to +125% derete linearity at 12mW/℃ to 200mw; (6)device dissipation per output transistor for TA full package-temperature range (all package-types: 100rnW; (7)operating-temperature range (TA): -55℃ to +125℃; (8)storage temperature range (Tstg): -65℃ to +150℃; (9)lead temperature (during soldering): at distance 1/16 ±1/32 inch (1.59±0.99mm) from case for 10s max:+265℃.
Features
CD4030BE features: (1)medium-speed operation-tpHL~tpl_H = 65ns(typ) at VDD=10V, CL=50pF; (2)100% tested for quieseent current at 20; (3)standardized, symmetrical output characteristics; (4)5-V, 10-V, and 15-V parametric ratings; (5)maximum input current of 1 μA at 18 over full package-temperature range; 100 nA at 18 and 25gC; (6)noise margin(over full package-temperature range): 1V it VDD=5; 2V at VDD = 10; 2.5V at VDD=15V; (7)meets all requirements of JEDEC tentative standard No. 138, "standard specifications for description of series CMOS device".
Diagrams
| Image | Part No | Mfg | Description |  |
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 CD4030BE |
Texas Instruments |
Gates (AND / NAND / OR / NOR) Quad Exclusive |
Data Sheet |
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CD4030BEE4 |
Texas Instruments |
Gates (AND / NAND / OR / NOR) Quad Exclusive |
Data Sheet |
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