Product Summary
The CY7C1019CV33-12ZXC is a high-performance CMOS static RAM. The CY7C1019CV33-12ZXC is organized as 131,072 words by 8 bits. Easy memory expansion of the CY7C1019CV33-12ZXC is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active LOW Output Enable (OE), and three-state drivers. The CY7C1019CV33-12ZXC has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the CY7C1019CV33-12ZXC is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins.
Parametrics
CY7C1019CV33-12ZXC absolute maximum ratings: (1)Storage Temperature: -65 to +150 ℃; (2)Ambient Temperature with Power Applied: –55 to +125 ℃; (3)Supply Voltage on VCC to relative GND: –0.5 V to +4.6 V; (4)DC Voltage applied to outputs in high Z state: –0.5 V to VCC+0.5 V; (5)DC Input Voltage: –0.5 V to VCC+0.5 V; (6)Current into Outputs (LOW): 20 mA; (7)Static Discharge Voltage: >2001V; (8)Latch-Up Current: >200 mA.
Features
CY7C1019CV33-12ZXC features: (1)Pin and function compatible with CY7C1019CV33-12ZXC; (2)High speed: 8 ns; (3)CMOS for optimum speed/power; (4)Data retention at 2.0V; (5)Center power/ground pinout; (6)Automatic power-down when deselected; (7)Easy memory expansion with CE and OE options; (8)Available in 32-pin TSOP II and 400-mil SOJ package.
Diagrams
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![]() CY7C1019CV33-12ZXC |
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![]() IC SRAM 1MBIT 12NS 32TSOP |
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![]() Negotiable |
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![]() CY7C1019CV33-12ZXCT |
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![]() IC SRAM 1MBIT 12NS 32TSOP |
![]() Data Sheet |
![]() Negotiable |
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