(Hong Kong)
Product Summary
The CY7C1338-100AC is a 3.3V, 128K by 32 synchronous cache RAM. The CY7C1338-100AC is designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter of the CY7C1338-100AC captures the first address in a burst and increments the address automatically for the rest of the burst access. The CY7C1338-100AC allows both interleaved and linear burst sequences, selected by the MODE input pin.
Parametrics
CY7C1338-100AC absolute maximum ratings: (1)Storage Temperature: –65 to +150 ℃; (2)Ambient Temperature with Power Applied: –55 to +125 ℃; (3)Supply Voltage on VCC to Relative GND[2]: –0.5 V to +4.6 V; (4)DC Voltage Applied to Outputs[2] in High Z State: –0.5 V to VCC + 0.5 V; (5)DC Input Voltage[2]: –0.5 V to VCC + 0.5 V; (6)Current into Outputs (LOW): 20 mA; (7)Static Discharge Voltage: ＞2001V; (8)Latch-Up Current: ＞200 mA.
Features
CY7C1338-100AC features: (1)Supports 117-MHz microprocessor cache systems with zero wait states; (2)128K by 32 common I/O; (3)Fast clock-to-output times: 7.5 ns (117-MHz version); (4)Two-bit wraparound counter supporting either interleaved or linear burst sequence; (5)Separate processor and controller address strobes provide direct interface with the processor and external cache controller; (6)Synchronous self-timed write; (7)Asynchronous output enable; (8)3.3V I/Os; (9)JEDEC-standard pinout; (10)100-pin TQFP packaging; (11)ZZ “sleep” mode.
Diagrams
